Napatech’s Altera Programmable Network Cards Provide Scale-Out Efficiency for d-Matrix Artificial Intelligence Inferencing

19 May 2025 08:00 CEST

COPENHAGEN, Denmark – May 19, 2025 – Napatech™ (OSLO: NAPA.OL), a leading
provider of Programmable Network Interface Cards (NICs) used in data centers,
today disclosed a design win with d-Matrix, the creator of Corsair™, the world’s
most efficient Artificial Intelligence (AI) computing platform used for
inferencing in datacenters.

Inferencing is the cornerstone of artificial intelligence. It transforms the
knowledge from trained models to create predictions, decisions, and insights
that are practical and beneficial in real-world applications.

“The response to an early sample of a limitless number of AI use-cases has
captivated the imagination of users across a wide array of industries,” said
Lars Boilesen, Chief Executive Officer at Napatech. “However, the current
trajectory of AI computing is unsustainable. The d-Matrix Corsair solution
rebalances the data center by changing the cost and scalability in a sustainable
way that makes generative AI commercially viable for the masses.”

Napatech’s solution is a breakthrough design that targets one of the most
transformative use cases for programmable NICs, known as AI infrastructure. AI
is changing the way data centers are built, including a significant increase in
the number of servers deployed to meet the insatiable demand for new use cases.
AI Infrastructure is the method by which the servers are connected, forming a
massive, distributed neural network comprised of a cluster of AI servers. AI
Infrastructure requires a previously unseen combination of deterministic,
low-latency, high-bandwidth interconnects, with programmability to rapidly adapt
to evolving technology standards.

“Emerging data center AI deployments will not be possible without innovations in
server-to-network connectivity to complement the critical innovations within the
AI inference processing,” said Baron Fung, Senior Director at Dell’Oro Group.

Napatech’s solution is powered by the N3070X programmable AI NIC, using Altera’s
high-performance Agilex™ 7 FPGAs. Disclosed in April 2024 and specified along
with Altera and a tier-1 global server manufacturer, the product is available
today.

“Napatech’s N3070X programmable AI NIC is a purpose-built solution based on
Altera’s Connectivity Common Platform and inspired by existing hyperscale
solutions, “said Mike Fitton, Vice President and General Manager of Vertical
Markets at Altera. “We have focused our solutions on the high-growth AI segments
in the data center, where programmable NICs are ideally suited to meet the most
challenging and dynamic requirements. The AI NIC is a newer segment of the NIC
market requiring deterministic, low-latency, and high-bandwidth capabilities.
FPGAs bring an additional layer of value, offloading data engineering
capabilities from the compute, allowing the xPU to focus simply on compute
analytics.”

“Napatech’s Altera programmable NIC enables d-Matrix to deliver efficient
ultra-low latency distributed inference across multiple servers,” said Sree
Ganesen, Vice President of Product at d-Matrix. “Our customers get the benefit
of deploying an industry-standard Ethernet-based scale-out solution while taking
advantage of Corsair’s blazing fast inference speeds.”


About Napatech
Napatech is the leading supplier of programmable NICs, including SmartNICs and
IPUs, used in cloud, enterprise, and telecom data centers. Through
commercial-grade software suites integrated with high-performance hardware,
Napatech accelerates network infrastructure, security, and storage workloads to
deliver best-in-class system-level performance while maximizing the availability
of server compute resources for applications, services, and revenue. Additional
information is available at www.napatech.com.

About d-Matrix
d-Matrix advances compute for modern AI workloads and is a pioneer in Digital
In-Memory Computing (DIMC) solutions that solve limitations on GenAI inference
acceleration. d-Matrix creates flexible solutions for inference at scale using
innovative circuits and packaging techniques, a chiplet-based DIMC architecture,
interconnect fabric, and hardware-software codesign. Founded in 2019, the
company is backed by top investors and strategic partners including Playground
Global, M12 (Microsoft Venture Fund), Temasek, Triatomic Capital, SK Hynix,
Nautilus Venture Partners, Marvell Technology and Entrada Ventures.

No Forward-Looking Statements
This press release may contain forward-looking statements which are only
predictions and may differ materially from actual future events or results due
to a variety of factors, including but not limited to, business conditions,
trends in the industry and markets, global economic and geopolitical conditions,
macro-economic factors, and other risks and uncertainties set forth in
Napatech’s reports. The matter discussed in this release is based on current
expectations and is subject to change. Napatech will not necessarily update this
information. For details, visit us at www.napatech.com.

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646742_Napatech Provides Scale-Out Efficiency for d-Matrix AI Inferencing.pdf