NEW PATENT FILED BY DOLPHIN INTEGRATION

22 Aug 2017 14:28 CEST

Dolphin Integration announces the filing of a patent relating to the management of the consumption modes of Systems-on-chip or SoC. This patent addresses the problem of control of resources (power supplies, clock signals…) in order to master the critical phases of the start-up and changes in consumption patterns: ignition, extinction, change of power level or operating frequency.

MAESTRO, a module configurator which relies on this patent to realize a network for controlling the changes of mode, is particularly aimed at the market of low-power SoCs, such as nomadic systems and the Internet of Objects. This IoT market is growing and is expected to generate a turnover of 15.2 billion euros in 2020. Dolphin Integration, enabling with MAESTRO substantial productivity gains during design and verification by its users, contributes to the growth of these markets through the largest number of fabless integrators.

No attempt to find a competing solution can thus exploit the principle of subsidiarity, which makes it possible to natively integrate a conflict manager between queries of the components with respect to changes in the state of their resources, power supplies and clocks. MAESTRO is therefore a solution with unmatched ease of use and robustness.

As the conductor, it is also the link between the application program and the various resources (FABRIC IP) present on SoC for which Dolphin Integration proposes an offer tailored to the needs of each SoC: power regulators (DELTA), power switches (CLICK and NEVA) and oscillators (GAMMA). This innovative product, at the heart of the company's offer, is therefore expected to contribute substantially to its growth in the coming years.

The user of MAESTRO thus benefits from the advantages of a block of "Silicon IP" with all the flexibility provided by its configurator. It provides a ready-to-use, easy-to-integrate solution, which allows the implementation of the most advanced power management techniques such as DVFS or AVFS (Dual & Adaptive Voltage and Frequency Stepping) , And which best suits the structure of its circuit. It reduces both the risks inherent in the development of a specific component, its design time and its validation time.

MAESTRO, and more broadly the whole of FABRIC IP, will be honored in the communication from Dolphin Integration in the coming months. They will be presented at prestigious events which will take place in the United States, China and Europe.

The Chairman

Connect_2017-08-22.pdf